Do you want to never have to hire me again as a Robust IC Design Consultant ?
One step towards that goal is for your company to purchase our Platinum Level Corporate Training: Robust Design of Circuits with fewer than 100,000,000 transistors*.
This training is an add on solution to one of our Platinum Level Robust IC Design Solutions (Platinum Level Parametric Yield Optimization, Platinum Level Chip Area Reduction or Platinum Level Performance Variability Reduction). It CANNOT be purchased separately. For an additional $62,080 (due only if the Platinum Level Solution is successful), your design and CAD engineers will get 16 hours of on site instruction, as follows:
1) First Friday of the month, 3 PM to 5 PM: Problem Formulation.
Introduce the students (your design and CAD engineers) to the Robust IC Design problem (parametric yield optimization, transistor area reduction or standard cells variability reduction) that I will be working on that month as the Platinum Level Solution. Explain to the students the importance of studying all the course material at https://RobustICDesignUniversity.com
2) Second Friday of the month, 3 PM to 5 PM: Q&A regarding Robust IC Design 300+ level courses from https://RobustICDesignUniversity.com
3) Third Friday of the month, 3 PM to 5 PM: Q&A regarding Robust IC Design 201 from https://RobustICDesignUniversity.com
4) Week after the Third Friday of the month:
4.a) Monday, 3 PM to 5 PM: Hands of resolution of the problem formulated the first Friday of the month.
4.b) Tuesday, 3 PM to 5 PM: Critic and Q&A regarding the resolution of the problem formulated the first Friday of the month.
4.c) Wednesday and Thursday, 3 PM to 5 PM: Bring Your Own Circuit (< 100,000,000 transistors*) to class:
One or two Circuits will be selected among the ones brought to class by the students, and we will all try to optimize its yield and/or reduce its transistor area.
4.d) General Q&A about Robust IC Design:
Preference will be given to the Robust Design of Circuits (fewer than 100,000,000 transistors*).
But, time permitting, questions about Robust Design of ICs (<100,000,000 transistors*) will be answered too.
To get started, select one of our Platinum Level Solutions (Platinum Level Parametric Yield Optimization, Platinum Level Chip Area Reduction or Platinum Level Performance Variability Reduction) and, in your email to achab@abdenourachab.
* Transistor Accounting: the number of transistors is the number of transistors that will ultimately be in the manufactured circuit. So, if you have a netlist with 900,000 transistors and a behavioral model that will ultimately be implemented in manufacturing with billions of transistors, that's a billions transistors circuit, NOT an Circuit with few than 100,000,000 transistors.