Bronze Level Parametric Yield Optimization: ICs with fewer than 100,000 Transistors*

Do you have an IC (fewer than 100,000 transistors*) for which you are struggling to bring the parametric yield to 100% without significantly increasing design time and/or transistor area ?

If so, I will come to your company site and, for only $32,560, cut the difference between 100% and the parametric yield by two or more in less than a month, without increasing transistor area by more than 10%. So, if, for example, the parametric yield of your IC is currently 50%, I will bring its parametric yield 75% or more. If the parametric yield of your IC is 90%, I will bring it to 95% or more. If you hand me a IC with 98% yield, I will raise the yield to 99% ore more.

What if I don't achieve the above target in less than a month ? In that case, you pay nothing.

Now, I know what you are thinking. This type of solution will probably cost you $5.13 trillion dollars, or, at the very lease, $700 billion. But don't worry. I won't charge you $5.13 trillion. I won't even charge you $700 billion. You will get all of the above for a mere $32,416. That's right, only $32,416.


Terms and Conditions: 

The work month has to be a calendar month, starting the first, second or third day of the month, and ending the last day of the month.

On the first day of work, you have to provide me with all of the following:

1. An HSpice, Spectre or Eldo (SCAM** Simulator) netlist that you used to run Monte Carlo simulations.

2. Whatever statistical analysis you have performed with SCAM** Statistical Vaporware***, including mismatch analysis if any.

3. An office environment (cubicle or office), with a computer and access at least one license to all of the tools mentioned above.

4. The ability for me to install NGSpice and whatever other software I need.


Note: except as part of our Summer Internship Programs, the above solution won't be available until March 1, 2035.


To get started, email with the following subject line: Bronze Level Solution: Parametric Yield Optimization of Analog ICs with fewer than 10 Transistors*


* Transistor Accounting: the number of transistors is the number of transistors that will ultimately be in the manufactured circuit. So, if you have a netlist with 90,000 transistors and a behavioral model that will ultimately be implemented in manufacturing with millions of transistors, that's a millions transistors circuit, NOT an IC with few than 100,000 transistors.

** SCAM: Defined in the glossary

*** Statistical Vaporware: Defined in the glossary